1. Field of the Invention
The invention generally relates to the field of semiconductor data storage devices and more particularly relates to semiconductor storage arrays and switching circuits for use therein in which a three terminal controlled-inversion device is the sole active element in each storage cell of the array.
2. Description of the Prior Art
Multi-terminal controlled-inversion semiconductor devices are found in the art and are characterized by an abruptly switchable transition in current-carrying capacity at a predetermined threshold condition. One such three electrode controlled-inversion device is described in the H. Kroger U.S. Pat. No. 3,979,613 for "Multi-Terminal Controlled-Inversion Semiconductor Devices", issued Sept. 7, 1976, and takes the general form of a multi-layer metal, non linear resistor, semiconductor device having current or voltage controllable switching characteristics through the use of certain nitrides of silicon in the non-linear resistive layer, the non-linear layer controlling the rate of injection of carriers with respect to their rate of removal by conductive flow through the layer when in its low impedance state. The threshold at which abrupt switching with respect to the high impedance state occurs is readily raised or lowered according to the magnitude and polarity of the voltage applied across the semiconductor interface. Polycrystalline silicon and silicon dioxide have also been successfully substituted for the nitrides of silicon used in the non-linear layer. Other materials may be substituted.
Devices of the type of the foregoing Kroger patent operate on certain of the principles earlier found useful in controlled-inversion bistable diode devices which are multi-layer metal, non-linear resistance, semiconductor devices or, alternatively, are metal, non-linear resistance, semiconductor barrier-emitter devices, both of which diode devices may be switched between two or more relatively stable impedance states. Such diode devices and circuits for their application are presented in the H. Kroger, H. A. R. Wegener U.S. Pat. No. 3,831,185 for a "Controllable Inversion Bistable Switching Diode", issued Aug. 20, 1974. Similar devices employing metal-barrier emitters and associated circuits are disclosed in the H. Kroger U.S. Pat. No. 3,831,186 for a "Controlled Inversion Bistable Switching Diode Device Employing Barrier Emitters", issued Aug. 20, 1974. In addition to describing the silicon nitride kind of controlled-inversion semiconductors and circuits for their employment, the aforementioned patents, all of which are assigned to Sperry Rand Corporation, disclose details of the structure and methods of manufacture of these multi-terminal bistable devices.
Both the silicon nitride devices and polycrystalline silicon and silicon dioxide multi-electrode bistable devices as will be described offer utility wherever rapid and reliable switching between two stable impedance states is desired and lend themselves to use in integrated circuits for which relatively low temperature fabrication may be employed, assuring reliability of the product. Having relatively high speed switching capabilities and relatively low power consumption, these new bistable devices afford extensive utility in such storage and logic devices as high packing-density memory arrays.
There are, of course, many types of reasonably competitive semiconductor storage array devices present in the art. None is simple and each has its particular beneficial attributes, but attendant difficulties are not generally avoided. For example, metal-oxide-silicon (MOS) storage devices are attractive for use in memory arrays because high packing densities and thus small memory arrays may theoretically be achieved; but such MOS memories are dynamic memories, so that the stored data must be refreshed periodically. Some of the theoretical size reduction of the array is therefore lost because complex data refreshing circuits must also be placed on the integrated memory circuit. There is a consequent undesirable demand for additional operating power. Bipolar storage arrays have been considered attractive because of their high operational speed; however, this high speed is achieved at the cost of a level of power consumption considerably higher than that of the MOS storage array. The art has not offered an entirely satisfactory high-density semiconductor memory array operating at a fully acceptable power level and also having other desirable characteristics, including ease of fabrication, and it is the object of the present invention to supply such devices employing certain of the principles taught in the aforementioned patents whereby advantageous storage devices are achieved using only one active semiconductor device per storage site.